VHDL 코딩 도와주세요

아래는 코드이고
발생한 오류는
Error: Node instance "LCD_DISP" instantiates undefined entity "lcd_display"
이거에요.
어느 부분을 바꿔야 할까요???
도와주세요ㅜㅜ

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
use ieee.std_logic_arith.all;

entity Mario is
port( LED : in std_logic_vector(15 downto 0); --LED
stage1 : in std_logic_vector ( 7 downto 0);
CLK: in std_logic;
START : in std_logic_vector( 7 downto 0);
RESET : in std_logic_vector( 7 downto 0);
JUMP : in std_logic_vector( 7 downto 0);
e : out std_logic;
rs : out std_logic;
rw : out std_logic;
data : out std_logic_Vector(7 downto 0));
end Mario;

architecture Behavioral of Mario is
component lcd_display is
port(clr_trig : in std_logic;
CLK : in std_logic;
char_trig : in std_logic;
char_in : in std_logic_vector(7 downto 0);
addr_trig : in std_logic;
addr_in : in std_logic_vector(6 downto 0);
lcd_rdy : out std_logic;
lcd_rs :out std_logic;
lcd_e : out std_logic;
lcd_d : out std_logic_vector(7 downto 0));
end component;

signal lcd_rdy_temp : std_logic:='0';
signal lcd_clear : std_logic:='0';
signal data_in : std_logic:='0';
signal address_in : std_logic:='0';
signal lcd_data : std_logic_vector(7 downto 0):=(others=>'0');
signal address : std_logic_vector(6 downto 0):=(others=>'0');

begin
rw <= '0';
lcd_disp : lcd_display port map(
clk => clk,
clr_trig => lcd_clear,
char_trig => data_in,
char_in => lcd_data,
addr_trig => address_in,
addr_in => address,
lcd_rdy => lcd_rdy_temp,
lcd_rs => rs,
lcd_e => e,
lcd_d => data);


process(CLK) ----main
variable char : integer range 0 to 14 :=0;
begin
if(CLK'event and CLK='1') then
if(lcd_rdy_temp ='1' and data_in ='0' and address_in='0') then
if (char <34) then
char := char+1;
end if;

if stage1= "00000001" then
if START= "00000001" then
if(clk='1') then

case char is
when 1 => lcd_data <= "01101100" ; data_in <='1' ; -- I
when 2 => lcd_data <= "10000000" ; data_in <='1' ;
when 3 => lcd_data <= "01000001" ; data_in <='1' ; -- A
when 4 => lcd_data <= "00110100" ; data_in <='1' ; -- M
when 5 => lcd_data <= "10000000" ; data_in <='1' ;
when 6 => lcd_data <= "01101100" ; data_in <='1' ; -- I
when 7 => lcd_data <= "01010010" ; data_in <='1' ; -- R
when 8 => lcd_data <= "01001111" ; data_in <='1' ; -- O
when 9 => lcd_data <= "01001110" ; data_in <='1' ; -- N
when 10 => lcd_data <= "10000000" ; data_in <='1' ;
when 11 => lcd_data <= "00110100" ; data_in <='1' ; -- M
when 12 => lcd_data <= "01000001"; data_in <='1' ; -- A
when 13 => lcd_data <= "01001110"; data_in <='1' ; -- N
when others => data_in <= '0'; address_in <= '0';
end case;

else
data_in <='0'; address_in <='0';
end if;

end if;
end if;
end if;
end if;


end process;
end Behavioral;